Position SummaryThe ASIC/Layout Design Engineer 1 position is responsible for performing basic physical design and layout activities within our semiconductor company.
The position supports ASIC layout development, assists with physical verification, and helps implement design components.Key ResponsibilitiesLayout Design Support (30%)Support physical layout of standard cells, memory blocks, and basic circuit elementsAssist with implementation of layout designs based on schematics and specificationsHelp with placement and routing of components and interconnectsSupport floorplanning and power distribution network developmentMaintain layout documentation and design filesPhysical Verification Support (25%)Assist with design rule checking (DRC) and layout vs. schematic (LVS) verificationSupport resolution of basic physical verification issuesHelp with design rule violations identification and correctionParticipate in verification run setup and executionDocument verification results an...