Responsibilities

• Lead verification efforts for FPGA IP and subsystems within high-performance wireless communication systems
• Develop and execute comprehensive verification plans ensuring functional correctness and robustness of FPGA designs
• Design and maintain SystemVerilog/UVM-based test environments for complex digital systems
• Create constrained-random test cases, assertions, and scoreboards to validate design behavior
• Execute simulations and debug issues using industry-standard tools (e.g., VCS or equivalent)
• Analyze and close functional and code coverage gaps to ensure complete verification sign-off
• Perform root-cause analysis of RTL and system-level defects independently
• Collaborate with design and system teams to review specifications, interfaces, and edge cases
• Contribute to architecture and design reviews a...